The second job is to implement a parallel interface compatible with the 82C55A chip. See specifications in these two files: 1, 2.
Use the entity below:
entity i82c55a is port (- OCP Clk interface signals: in std_logic; Reset_n: in std_logic; MAddr: in std_logic_vector (1 downto 0); MCmd: in std_logic_vector (2 downto 0); MData: in std_logic_vector (7 downto 0) ; SCmdAccept: out std_logic; SData: out std_logic_vector (7 downto 0); SResp: out std_logic_vector (1 downto 0); SInterrupt: out std_logic; - External signals PA: inout std_logic_vector (7 downto 0); PB: inout std_logic (PB: inout std_logic 7 downto 0); PC: inout std_logic_vector (7 downto 0)); end entity i82c55a;
All names must be identical to those described above.