MO801 / MC912 - Job 1

General Information

Objective

Improve knowledge of synthesizable VHDL and collect characteristics of the generated circuit (area and performance).

Description

A quadrature counter is a circuit used to, in conjunction with a sprocket and two sensors, measure wheel movement. The figure below indicates the arrangement of the two sensors in relation to the sprocket. Assuming that the sensors are active when light can pass between the teeth of the wheel, if sensor A becomes active and, immediately afterwards, sensor B becomes active, it means that the wheel in the figure below has turned clockwise.

Gear

A mechanical mouse is formed by two quadrature sensors to detect movement, 3 buttons and a third quadrature sensor to detect movement scroll. You must implement, in synthesizable VHDL (RTL) the control circuit of this mouse. The implemented entity it must be exactly:

entity Quadrature is
generic (debounce: natural: = 7);
port (click,
reset,
reading,
horizontalA,
horizontalB,
verticalA,
verticalB,
scrollA,
scrollB,
button,
button,
buttonD: in std_logic;
changed: out std_logic;
x,
y,
scroll: out integer;
buttons: out std_logic_vector (5 downto 0));
end entity Quadrature;
Your circuit must interpret all sensors and keep a total of the movements of the wheels and the states of the buttons. The stored values ​​must be provided whenever the signal reading is activated. The sign reading indicates that, in the next clock cycle, the output must be valid (for only one clock cycle), with the values ​​available in the current cycle.

Your circuit must perform a debounce of all input signals by the number of cycles informed using the generic parameter (the default value is 7).

The signs x, y e scroll must contain the amount of movement since the last time the signal reading has been activated. The sequence of activation of sensor A followed by sensor B means an increase in the value of the internal counters. An opposite sequence indicates a decrease in the sensor.

The sign reset resets all internal circuit counters and accumulators.

The sign buttons contain 3 sets of 2 fields in sequence: left button pressed, left button released, middle button pressed, middle button released, right button pressed and right button loose. Note that the vector is indexed from 5 to 0. These states must also be computed from the last reading of the value.

The sign altered indicates that any of the internal values ​​of the state counters or accumulators have changed since the last reading.

Your circuit must be sensitive to the rising edge of the signal clk (clock).

The figure below is an example of the output values ​​considering debounce = 7.

Quadrature counter waveform example

Activities to be done

Each student, individually and without consulting the work of another student, you must perform the following activities:

  • Implement, in VHDL, the circuit specified above, using as many files as necessary
  • Define and implement a testbench to the circuit
  • Use the ghdl to test the implementation
  • Ensure that your circuit goes through your testbench
  • Synthesize the circuit using Quartus II using an FPGA Cyclone II
  • Generate a summary report on the work (1 page, following the same specifications as the abstracts) containing the area and the maximum frequency of operation of the circuit

Students are allowed to test their models with the testbenches other students in the class.

Delivery

Each student must deliver their work by email, with only one file attached, named XXXXXX.tgz, where XXXXXX are the 6 digits of their RA (do not include the letters RA in the file name). Within this file there must be a directory whose name will be the 6 digits of your RA (without the letters RA). Within this directory must be:
  • The report in the format of the abstracts
  • The files of the implementation of the circuit
  • The circuit testbench
  • The main file has to be called quadrature.vhd and the testbench file has to be called tb_quadrature.vhd
  • Three scripts, one to compile your circuit without the testbench (compile.sh), another to compile the testbench (compile_tb.sh) and the third to run the testbench (execute.sh). O script program must create a file called ERROR in case of execution error and do not let it exist (delete it) if no error occurs.

Delivery must be made by email until 8:00 on 28/04/06. Email Subject: MO801: Delivery T1 - RA_Number

Correction

All work will be performed in an automatic evaluation environment using ghdl. Therefore, it is necessary that all the delivery steps are carried out correctly under the risk of the test indicating an error incorrectly. A template will be included in the set of works delivered and all works will be evaluated against all testbenches. This result will serve as the basis for the evaluation. Quartus II data will be verified and the best work in terms of area and performance will earn a bonus in the grade. The content of the implementation will be evaluated. The report will also be evaluated.

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