MO901 / MC039: Computing Seminars: Computer Architecture

01 / 03: Selected articles for presentation this semester.

01 / 03: Don't miss the important dates of the Graduation calendar e Graduate calendar.

Review the literature in the areas of Computer Architecture and Compilers through recent articles.

Selected articles for presentation this semester.

Recent articles in the areas of Computer Architecture and Compilers.

The assessment is based on presentations, presence and participation in class.

For graduation: Final Note = 0,5 * Presentation Note + 0,5 * Participation Note.

For graduate students: Concepts: S: presence> = 75%, I: presence <75%.

Any attempted fraud during the semester will be punished to the extent of my authority, including a zero score on the discipline for everyone involved.

Send email suggesting time.

09/032Locality-Oblivious Cache Organization leveraging Single-Cycle Multi-Hop NoCs. Woo Cheol Kwon (MIT); Tushar Krishna (MIT); Li-Shiuan Peh (MIT). ASPLES 2014.Jorge Gonzalez
16/033Improving the Energy Efficiency of Big Colors. Kenneth Czechowski (Georgia Institute of Technology), Victor W. Lee (Intel), Ed Grochowski (Intel), Ronny Ronen (Intel), Ronak Singhal (Intel), Richard Vuduc (Georgia Institute of Technology), Pradeep Dubey (Intel). BAIT 2014.Thiago Rocha
23/034The Benefit of SMT in the Multi-Core Era: Flexibility towards Degrees of Thread-Level Parallelism. Stijn Eyerman (Ghent University); Lieven Eeckhout (Ghent University). ASPLES 2014.Marcos Barros
30/035Exploiting Thermal Energy Storage to Reduce Data Center Capital and Operating Expenses. Wenli Zheng (The Ohio State University), Kai Ma (The Ohio State University), Xiaorui Wang (The Ohio State University). HPCA 2014.Cláudio Silva
06/045Skewed Compressed Cache🇧🇷 Somayeh Sardashti (University of Wisconsin - Madison), Andre Seznec (INRIA), David Wood (University of Wisconsin - Madison). MICRO 2014.Rafael Sousa
13/046Aladdin: A Pre-RTL, Power-Performance Accelerator Simulator Enabling Large Design Space Exploration of Customized Architectures. Yakun Sophia Shao, Brandon Reagen, Gu-Yeon Wei, David Brooks (Harvard University). BAIT 2014.Priscila
20/04-There will be no class
27/047Improving Cache Performance by Exploiting Read-Write Disparity🇧🇷 Samira Khan, Alaa R. Alameldeen, Chris Wilkerson, Onur Mutlu, Daniel A. Jimeenez. HPCA 2014.Mirela
04/058PyMTL: The Unified Framework for Vertically Integrated Computer Architecture Research. Lockhart, D .; Zibrat, G .; Batten, C .. MICRO 2014.Carlos Petry
11/059Load Value Approximation🇧🇷 Joshua San Miguel, Mario Badr, and Natalie Enright Jerger. MICRO 2014.Gustavo Henrique Czaikoski
18/0510Efficient Memory Virtualization🇧🇷 Jayneel Gandhi (University of Wisconsin - Madison), Arkaprava Basu (AMD), Michael M. Swift (University of Wisconsin - Madison), Mark D. Hill (University of Wisconsin - Madison)Daniel Goes
25/0511The Dirty-Block Index. Vivek Seshadri (Carnegie Mellon University), Abhishek Bhowmick (Carnegie Mellon University), Onur Mutlu (Carnegie Mellon University), Phillip B. Gibbons (Intel Pittsburgh), Michael A. Kozuch (Intel Pittsburgh), Todd C. Mowry (Carnegie Mellon University ). ISCA 2014.Raoni
01/0612Micro-Policies: Formally Verified, Tag-Based Security MonitorsArthur Azevedo de Amorim
08/0613Shrink: Reducing the ISA Complexity Via Instruction Recycling. Bruno Cardoso Lopes, Rafael Auler, Luiz Ramos, Edson Borin, Rodolfo Azevedo. ISCA-2015Rafael Auler
15/0614Seismic Wave Propagation Simulations on Low-power and Performance-centric Manycores
The vast data processing capabilities needed by seismic wave propagation simulations make HPC architectures a natural choice for their execution. However, the evolution of their power efficiency did not follow the pace of their evolution in performance. As a response to this divergence, energy-efficient and low-power processors began to make their way into the market. In this paper we employ a novel low-power processor, the MPPA-256 manycore, to perform seismic wave propagation simulations. It has 256 colors connected by a NoC, no cache-coherence and only a limited amount of on-chip memory. We describe how its architectural idiosyncrasies influenced our solution for an energy-efficient implementation. As a counterpoint to the low-power MPPA-256 architecture, we employ Xeon Phi, a performance-centric manycore. Although both processors share some architectural similarities, the challenges to implement an efficient seismic wave propagation kernel on these platforms are very di↵erent. In this work we compare the performance and energy efficiency of our implementations for these processors to proven and optimized solutions for other hardware platforms such as general-purpose processors and a GPU. Our experimental results show that MPPA-256 has the best energy efficiency, consuming at least 77% less energy than the other evaluated platforms, whereas the performance of our solution for the Xeon Phi is on par with a state-of-the-art solution for GPUs.