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Escolher um artigo relacionado com arquitetura de computadores de uma das duas últimas edições das seguintes conferências: MICRO, DAC, DATE, ISCA ou um artigo do último ano de uma das seguintes revistas: TOCS, TODAES, TECS. Resumir o artigo em 1 página (incluindo um cabeçalho com as informações sobre o artigo e sobre quem fez o resumo). O artigo original deve ter, no mínimo, 6 páginas. Os artigos deverão ser reservados por cada aluno enviando um e-mail com os dados bibliográficos e esta página será atualizada com os artigos já reservados (e o aluno que fez a reserva) por ordem de chegada. |
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Resumo T1-todos.pdf |
109222:
Closing the gap between UML-based modeling, simulation and synthesis of
combined HW/SW systems; Fabian Mischkalla, Da He, Wolfgang Mueller;
DATE - 2010 |
1 |
001963:
Exploring the Tradeoffs between Programmability and Efficiency in
Data-Parallel Accelerators; Yunsup Lee, Rimas Avizienis, Alex Bishara*,
Richard Xia, Derek Lockhart†, Christopher Batten, and Krste Asanovi´c; ISCA’11 |
001963.pdf |
134097: An architecture for self-organization in pervasive systems; Aly. A. Syed, Johan Lukkien, Roxana Frunza; DATE'10 |
134097.pdf |
115168: Identifying and predicting timing-critical instructions to boost timing speculation; Xin, Jing and Joseph, Russ; MICRO-44 '11 |
115168.pdf |
123789: RAID 6 Hardware Acceleration; MICHAEL GILROY, JAMES IRVINE, and ROBERT ATKINSON; TECS 2011 |
123789.pdf |
120437:
The Impact of Memory Subsystem Resource Sharing on Datacenter
Applications; Lingjia Tang, Jason Mars,Neil Vachharajani, Robert Hundt,
Mary Lou Soffa; ISCA 2011 |
120437.pdf |
085937 : Power management of online data-intensive services; David Meisner, Christopher M. Sadler, Luiz André Barroso, Wolf-Dietrich Weber, Thomas F. Wenisch; ISCA 2011 | 085937.pdf |
123542:
Scalable hybrid verification for embedded softwar; Behrend, J.;
Lettnin, D.; Heckeler, P.; Ruf, J.; Kropf, T.; Rosenstiel, W.; DATE 2011 |
123542.pdf |
134078: FabScalar: composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template; ISCA 2011 |
134078.pdf |
134049:
Evolution of Thread-Level Parallelism in Desktop Applications; Geoffrey
Blake, Ronald G. Dreslinski, Trevor Mudge, Krisztián Flautner; ISCA 2010 |
134049.pdf |
124208: A reconfigurable cache memory with heterogeneous banks; Benitez, D. ; Moure, J.C. ; Rexachs, D. ; Luque, E.; DATE 2010 |
124208.pdf |
820650:
Prefetch-aware shared resource management for multi-core systems; Eiman
Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N. Patt; ISCA '11 |
820650.pdf |
023169: A Novel Tag Access Scheme for Low Power L2 Cache; Hyunsun Park, Sungjoo Yoo, Sunggu Lee; DATE 2011 |
023169.pdf |
134047: A new IP lookup cache for high performance IP routers; Guangdeng Liao, Heeyeol Yu, and Laxmi Bhuyan; DAC '10 |
134047.pdf |
076673: Virtualizing performance asymmetric multi-core systems; Youngjin Kwon, Changdae Kim, Seungryoul Maeng, Jaehyuk Huh; ISCA 2011 |
076673.pdf |
100616:
Architectural Support for Secure Virtualization under a Vulnerable
Hypervisor; Seongwook Jin, Jeongseob Ahn, Sanghoon Cha, and
Jaehyuk Huh; MICRO'11 |
100616.pdf |
134072: i-NVMM: a secure non-volatile main memory system with incremental encryption; Siddhartha Chhabra and Yan Solihin; ISCA '11 |
134072.pdf |
032483:
A first step towards automatic application of power analysis
countermeasures; Bayrak, Ali Galip and Regazzoni, Francesco and Brisk,
Philip and Standaert, François-Xavier and Ienne, Paolo; DAC '11 |
032483.pdf |
098334:
The Impact of Management Operations on the Virtualized Datacenter;
Vijayaraghavan Soundararajan e Jennifer M. Anderson ; ISCA '10 |
19 |
134063:
Automatic Workload Generation for System-Level Exploration Based on
Modified GCC Compiler; J. Kreku, K. Teinsyrja and G.
Vanmeerbeeck; DATE 2010 | 134063.pdf |
079740:
Register allocation for simultaneous reduction of energy and peak
temperature on registers; Tiantian Liu, Alex Orailoglu, Chun Jason Xue
and Minming Li; DATE 2011 | 079740.pdf |
134077: Idempotent processor architecture; Marc de Kruijf and Karthikeyan Sankaralingam; MICRO-44 '11 | 134077.pdf |
134163: A Robust Mechanism for Adaptive Scheduling of Multimedia Applications; Tommaso Cucinotta, Luca Abeni, Luigi Palopoli, Giuseppe Lipari; TECS 2011 | 134163.pdf |
079713: A shared-variable-based synchronization approach to efficient cache coherence simulation for multi-core systems; Cheng-Yang Fu, Meng-Huan Wu e Ren-Song Tsay; DATE 2011 | 079713.pdf |
120441: Parallel Application Memory Scheduling; Eiman Ebrahimi, Rustam Miftakhutdinov, Chris Fallin, Chang Joo Lee, José A. Joao, Onur Mutlu, Yale N. Patt; MICRO 2011 | 25 |
134068: Releasing Efficient Beta Cores to Market Early; Sangeetha Sudhakrishnan, Rigo Dicochea, and Jose Renau; ISCA'11 | 134068.pdf |
134042: Fractal Coherence: Scalably Verifiable Cache Coherence; Meng Zhang; Lebeck, A.R.; Sorin, D.J.; MICRO 2010 | 134042.pdf |
134071: ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory; Jaewoong Chung; Yen, L.; Diestelhorst, S.; Pohlack, M.; Hohmuth, M.; Christie, D.; Grossman, D.; MICRO 2010 | 134071.pdf |
090056: Design of High Speed Digital Circuits with E-TSPC Cell Library; João Navarro S. Jr, Gustavo C. Martins, TODAES-2011 |
090056.pdf |
045840:
Dataflow execution of sequential imperative programs on multicore
architectures: Gupta, Gagan and Sohi, Gurindar S.; MICRO'11 |
045840.pdf |