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ac_cache.H

00001 /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- */
00002 
00003 /*  ArchC Cache Library for the ArchC architecture simulators
00004     Copyright (C) 2002-2004  The ArchC Team
00005 
00006     This library is free software; you can redistribute it and/or
00007     modify it under the terms of the GNU Lesser General Public
00008     License as published by the Free Software Foundation; either
00009     version 2.1 of the License, or (at your option) any later version.
00010 
00011     This library is distributed in the hope that it will be useful,
00012     but WITHOUT ANY WARRANTY; without even the implied warranty of
00013     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00014     Lesser General Public License for more details.
00015 */
00016 
00017 /********************************************************/
00018 /* The ArchC cache simulation class.                    */
00019 /* Author:  Pablo Viana (CIn-UFPE)                      */
00020 /* Contact: pvs@cin.ufpe.br                             */
00021 /*                                                      */
00022 /* The ArchC Team                                       */
00023 /* Computer Systems Laboratory (LSC)                    */
00024 /* IC-UNICAMP                                           */
00025 /* http://www.lsc.ic.unicamp.br                         */
00026 /********************************************************/
00027 
00028 #include <stdio.h>
00029 #include <stdlib.h>
00030 #include <list>
00031 #include "ac_storage.H"
00032 #include "ac_cache_if.H"
00033 
00034 #include <string>
00035 #include "fstream"
00036 
00037 
00038 
00039 #ifndef _AC_CACHE_H
00040 #define _AC_CACHE_H
00041 
00042 
00043 //#ifndef AC_DETAIL
00044 //#define AC_DETAIL
00045 //#endif
00046 
00047 
00048 #define WRITE_THROUGH true
00049 //#define AC_TRACE true
00050 //#define AC_DETAIL true
00051 
00052 #ifndef RAND_MAX
00053   #define RAND_MAX 1024;
00054 #endif
00055 
00056 #define RANDOM 0
00057 #define LRU 1
00058 #define DEFAULT 2
00059 
00060 #define W_WORD 4
00061 #define W_HALF 2
00062 #define W_BYTE 1
00063 
00064 
00075 
00076 
00077 
00078 class ac_cache: /*public sc_module,*/ public ac_storage , public ac_cache_if{
00079 
00080   unsigned block_size;           
00081   unsigned num_blocks;           
00082   unsigned set_size;
00083   unsigned num_sets;
00084   unsigned * tag;                
00085   bool * valid;                  
00086   bool * dirty;
00087   unsigned codeSize;
00088   unsigned *  chosen;             
00089   unsigned * tracker;            
00090   int strategy;
00091 //  ac_storage* next_level;       //!Next lower level of the hierarchy
00092 //  ac_storage* previous_level;   //!Previous upper level of the hierarchy
00093   ac_cache_if* next_level;       
00094   ac_cache_if* previous_level;   
00095 
00096 
00097 private:
00098 
00100       unsigned offset;
00101       unsigned set;
00102       unsigned address_tag;
00103 
00105       char *slot_data;
00106       unsigned *slot_tag;
00107       bool *slot_valid;
00108       bool *slot_dirty;
00109       unsigned element; //set' s line used
00110 
00111       unsigned char write_policy; //byte register with the write setup |7|6|5|4|3|2|1|0|
00112       // bit 0 - if set is write-through      // bit 4 - if set is write-allocate
00113       // bit 1 - if set is write-back         // bit 5 - if set is write-around
00114       // bit 2 - not used                     // bit 6 - not used
00115       // bit 3- not used                      // bit 7 - not used
00116 
00117        char *request_buffer;
00118        int write_size;
00119        bool read_access_type;
00120        char* datum_ref;
00121        ac_cache_if* client_global;
00122        bool request_block_event;
00123        bool request_write_block_event;
00124        bool request_write_event;
00125 
00126 
00127 
00128 
00129 #ifdef  AC_TRACE  
00130       char padding;
00131       char access_type;
00132       short size_ref;
00133 #endif
00134 
00135       int hit;       // reset the hit event
00136 
00137       unsigned char replace_status;
00138       unsigned requested_address;
00139 
00140       void ac_cache::addressing(unsigned address);               //slicing the address field
00141       void ac_cache::tracing(unsigned address, unsigned type);  //access trace file writing
00142 //      void ac_cache::requestFromNext(unsigned address);         //request data from next storage level
00143 
00144       void ac_cache::replaceBlockWrite();            //replace the block with the required data
00145       void ac_cache::replaceBlockRead(unsigned address);            //replace the block with the required data
00146 
00147       void ac_cache::writingBack();              //write back to the lower level the modified blocks
00148 
00149       bool ac_cache::isWriteThrough();        //Checks the write-through policy
00150       bool ac_cache::isWriteBack();           //Checks the write-back policy
00151       bool ac_cache::isWriteAllocate();       //Checks the write-allocate policy
00152       bool ac_cache::isWriteAround();         //Checks the write-around policy
00153 
00154 
00155 public:
00156 #ifdef AC_TRACE
00157   ofstream trace;
00158 #endif
00159 //  FILE* trace;
00161   //
00167   virtual ac_word ac_cache::read( unsigned address );
00168 
00170   //
00176 
00177 
00179   virtual unsigned char ac_cache::read_byte( unsigned address );
00180 
00181 
00183   virtual ac_Hword ac_cache::read_half( unsigned address );
00184 
00185 
00186 
00187   virtual void ac_cache::write( unsigned address, ac_word datum );
00188 
00190   //
00195   virtual void ac_cache::write_byte( unsigned address, unsigned char datum );
00196 
00198   //
00204 
00205   virtual void ac_cache::write_half( unsigned address, unsigned short datum );
00206 
00208   //
00218   ac_cache::ac_cache( char *n, unsigned bs, unsigned nb, unsigned ss, unsigned st, unsigned char wp = 0x11);
00219 
00220 
00221 
00223   ac_cache::~ac_cache();
00224 
00225   //
00226   void ac_cache::bindTo(ac_cache& lower);
00227 
00229   void ac_cache::set_codeSize( unsigned s);
00230 
00231 /*  void ac_cache::initialize(){
00232     ac_storage::initialize((unsigned)block_size*num_blocks);
00233     chosen = new char[this->num_sets];
00234     tracker = new char[this->set_size * this->num_sets];
00235     tag = new char[num_blocks*AC_WORDSIZE/8];
00236     valid = new bool[num_blocks];
00237     *valid = false;
00238     codeSize = 0;
00239   }
00240 */
00241 
00242 
00243   unsigned ac_cache::get_chosen(unsigned s);
00244 
00246   void ac_cache::update(unsigned s, unsigned e);
00247 
00248   unsigned ac_cache::get_codeSize();
00249 
00250   void ac_cache::stall();
00251 
00252 //  void ac_cache::ready();
00253   void ac_cache::ready();
00254 
00255 
00256   void request_block(ac_cache_if* client, unsigned address, unsigned size_bytes);
00257   void request_write_byte(ac_cache_if* client, unsigned address, unsigned char datum);
00258   void request_write_half(ac_cache_if* client, unsigned address, unsigned short datum);
00259   void request_write(ac_cache_if* client, unsigned address, ac_word datum);
00260   void request_write_block(ac_cache_if* client, unsigned address, char* datum, unsigned size_bytes);
00261 
00262   void response_block(char* block);
00263   void response_write_byte();
00264   void response_write_half();
00265   void response_write();
00266   void response_write_block();
00267 
00268   void bindToNext(ac_cache_if& next);
00269   void bindToPrevious(ac_cache_if& previous);
00270 
00271 //       SC_HAS_PROCESS(ac_cache);
00272   void process_request();
00273 
00274 };
00275 #endif
00276 

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