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Agenda de Seminários

Primeiro conjunto de seminários

Cada seminário deve ser apresentado em 20 minutos e será seguido de 5 minutos para perguntas.

Data Aluno(a) Artigo
22/04 298418 A Constructive Approach to Hardware/Software Partitioning
22/04 245294 A Hardware/Software Co-Design of MP3 Audio Decoder
22/04 235883 Integrated Hardware/Software Codesign for Heterogeneous Computing Systems
24/04 290192 Flexible Software Protection Using Hardware/Software Codesign Techniques
24/04 214321 Quantitative global dataflow analysis on virtual instruction set simulators for hardware/software co-design
24/04 291206 Hardware/Software Co-Design for Near Real Time Enhancement of Remote Sensing Imaging
24/04 213095 A hardware/software co-design approach for face recognition
29/04 222157 A hardware/software codesign for improved data acquisition in a processor-based embedded system
29/04 194019 Hardware/software codesign and rapid prototyping of embedded systems
29/04 182956 / 217787 Hardware-software codesign of a tightly-coupled coprocessor for video content analysis
29/04 298254 A Hardware/Software Codesign for Image Processing in a Processor Based Embedded System for Vehicle Detection
06/05 186397 Reliability-centric hardware/software co-design
06/05 234619 Design and evaluation of a hardware/software FPGA-based system for fast image processing
06/05 32184 Hardware/Software Co-design of Control Algorithms
06/05 295743 Hardware/software codesign methodology for fuzzy controller implementation
08/05 291695 Hardware-software co-design of embedded reconfigurable architectures
08/05 291649 A Hardware/Software Co-design of a Face Detection Algorithm Based on FPGA

Segundo conjunto de seminários

Data Aluno(a) Artigo Ano Veículo
17/jun 32184 SP-PIM: A Super-Pipelined Processing-In-Memory Accelerator With Local Error Prediction for Area/Energy-Efficient On-Device Learning 2024 IEEE Journal of Solid-State Circuits
17/jun 32184 A Heterogeneous PIM Hardware-Software Co-Design for Energy-Efficient Graph Processing 2020 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS)
17/jun 32184 Using a Complementary Emulation-Simulation Co-Design Approach to Assess Application Readiness for Processing-in-Memory Systems 2014 2014 Hardware-Software Co-Design for High Performance Computing
17/jun 182956 217787 Exploring HW/SW Co-Design for Video Analysis on CPU-FPGA Heterogeneous Systems 2022 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 41, NO. 6, JUNE 2022
17/jun 182956 217787 An Efficient Deep Learning Accelerator Architecture for Compressed Video Analysis 2021 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 41, NO. 9, SEPTEMBER 2022
17/jun 182956 217787 Speeding up a Video Summarization Approach Using GPUs and Multicore CPUs 2014 ICCS 2014. 14th International Conference on Computational Science
17/jun 214321 HIDA: A Hierarchical Dataflow Compiler for High-Level Synthesis 2024 ASPLOS '24: Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems
17/jun 214321 The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips 2018 IEEE Micro ( Volume: 38, Issue: 2, Mar./Apr. 2018)
17/jun 214321 Bit-level optimization for high-level synthesis and FPGA-based acceleration 2010
17/jun 298418 Hardware-Software Co-Design of Deep Learning Accelerators: From Custom to Automated Design Methodologies 2024 National Technical University of Athens
17/jun 298418 LEARNED HARDWARE/SOFTWARE CO-DESIGN OF NEURAL ACCELERATORS 2020
17/jun 298418 SNNAP: Approximate Computing on Programmable SoCs via Neural Acceleration 2015 2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA)
24/jun 194019 Hardware-Software Co-Design for Performance Optimization in Embedded Systems 2025 International journal of emerging research in engineering and technology
24/jun 194019 A Hardware/Software Co-Design Approach for Real-Time Object Detection and Tracking on Embedded Devices 2018 SoutheastCon 2018
24/jun 194019 Introducing Hardware-in-Loop Concept to the Hardware/Software Co-design of Real-time Embedded Systems 2010 2010 10th IEEE International Conference on Computer and Information Technology (CIT 2010)
24/jun 222157 FPGA-based multi-channel data acquisition system for Superheated Emulsion Detectors 2021 Nuclear Inst. and Methods in Physics Research, A 1009 (2021) 165457
24/jun 222157 HW/SW co-design of nonvolatile IO system in energy harvesting sensor nodes for optimal data acquisition 2016 DAC '16: Proceedings of the 53rd Annual Design Automation Conference
24/jun 222157 Hardware/Software Co-design of an ATCA-based Computation Platform for Data Acquisition and Triggering 2009 16th IEEE-NPSS Real Time Conference
24/jun 291206 HW/SW co‑design on embedded SoC FPGA for star tracking optimization in space applications 2024 Journal of Real-Time Image Processing (2024)
24/jun 291206 A Novel Hardware–Software Co-Design and Implementation of the HOG Algorithm 2020 MDPI
24/jun 291206 Real-Time System Implementation for Image Processing with Hardware and Software Co-design on the Xilinx Zynq Platform 2015 International Journal of Information and Electronics Engineering
24/jun 298254 Real-Time Object Detection and Recognition in FPGABased Autonomous Driving Systems 2024 International Journal of Computer Trends and Technology (2024)
24/jun 298254 Hardware/Software Co-Design of a Traffic Sign Recognition System Using Zynq FPGAs 2015
24/jun 298254 Real Time Implementation of a License Plate Location Recognition System Based on Adaptive Morphology 2013 International Journal of Engineering
26/jun 234619 Software/Hardware Co-Design Optimization for Sparse Convolutional Neural Networks 2021 IEEE International Conference on Systems, Man and Cybernetics
26/jun 234619 Hardware/Software Codesign for Convolutional Neural Networks Exploiting Dynamic Partial Reconfiguration on PYNQ 2018 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW)
26/jun 234619 Hardware–software co-design of an iris recognition algorithm 2011 IET Information Security Volume 5, Issue 1
26/jun 291649 Co-Design of Hardware and Software for Facial Expression Recognition Using Xilinx Zynq SoC 2024 2024 36th Conference of Open Innovations Association (FRUCT)
26/jun 291649 Hardware-Software Co-Design for Face Recognition on FPGA SoCs 2020 2020 IEEE International Symposium on Circuits and Systems (ISCAS)
26/jun 291649 Hardware/Software Co-design for a Gender Recognition Embedded System 2016 International Conference on Industrial, Engineering and Other Applications of Applied Intelligent Systems
26/jun 291695 Dynamic FPGA reconfiguration for scalable embedded artificial intelligence (AI): A co-design methodology for convolutional neural networks (CNN) acceleration 2025 The International Journal of eScience - Future Generation Computer Systems
26/jun 291695 R-codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints 2018 IEEE Access
26/jun 291695 Hardware/software co-design of dataflow programs for reconfigurable hardware and multi-core platforms 2011 Conference on Design & Architectures for Signal & Image Processing (DASIP)
26/jun 295743 SAPFIS: a parallel fuzzy inference system for air combat situation assessment 2024 The Journal of Supercomputing
26/jun 295743 Hardware/Software Codesign for Intelligent Motor Drive on an FPGA 2020 2nd International Workshop on Human-Centric Smart Environments for Health and Well-being (IHSH)
26/jun 295743 Hardware/software implementation of PI/PD-like fuzzy controller for high performance motor drives 2011 IEEE Industry Applications Society Annual Meeting (IAS)