@inproceedings{ahm-zwo-08-aa-compopt,
  author = {Arash Ahmadi and Mark Zwolinski},
  title = {Symbolic Noise Analysis Approach to Computational Hardware Optimization},
  journal = {Proceedings of 45th ACM/IEEE Design Automation Conference},
  year = 2008,
  doi = {10.1145/1391469.1391573},
  pages = {391-396},
  comment = {Uses AA, but probabilistic?},
  abstract = {This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical algorithms always results in an optimization problem of trading computational error with implementation costs. In this study, a symbolic noise analysis method is introduced for high-level synthesis, which is based on symbolic modeling of the error bounds where the error symbols are considered to be specified with a probability distribution function over a known range. The ability to combine word-length optimization with high-level synthesis parameters and costs to minimize the overall design cost is demonstrated using case studies.}
}