@entry{mia-12-aa-verilog,
  author = {RC Mial{\k{t}}u},
  title = {A SystemVerilog approach in system validation with affine arithmetic},
  journal = {CAS 2012 (International Semiconductor ...,},
  volume = {},
  number = {},
  pages = {},
  year = 2012,
  month = ,
  doi = {},
  comment = {},
  abstract = {},
  url = {{\url{https://ieeexplore.ieee.org/abstract/document/6400746/?casa_token=fYcf-a2GzbwAAAAA:vh3vBOTOIRey3Jf7zHdWnWmZkdPAbddcco7FPnPgaegerHJbgNW4blmu03_fCGV-05E44pcn}}},
  quotes = {This paper introduces an original approach to system modeling for performance analysis and optimization. The method presented herein theoretical background is the mathematical ...}
}