Artigos
já reservados:
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057639: Samuel Larsen, Rodric Rabbah and Saman Amarasinghe. Exploiting Vector Parallelism in Software Pipelined Loops; pp. 119 - 129; The 38th Annual IEEE/ACM International Symposium on Microarchitecture, 2005
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- 011104: Luiz Andre
Barroso, Jeffrey Dean, Urs Holzle. Web Search for a Planet: The Google
Cluster Architecture; pp. 22-28; IEEE
Micro 2003
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- 057615: Emil Talpes, Diana Marculescu. Increased Scalability
and Power Efficiency by Using Multiple Speed
Pipelines; ISCA 2005
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009649: D. N. Armstrong, H. Kim, O. Mutlu, and Y. N. Patt. Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery; pp. 119 - 128; The 37th Annual International Symposium on Microarchitecture, 2004
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- 895063: Vlad
Petric, Tingting Sha, Amir Roth. RENO: A Rename-Based Instruction
Optimizer; pp. 98-109; ISCA 05
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- 057642: KUMAR, R.
ZYUBAN, V. TULLSEN, D. M. Interconnections in Multi-core Architectures:
Understanding Mechanisms, Overheads and Scaling; ISCA’05
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- 991724:
Jungeun Kim; Taewhan Kim. Memory
access optimization through combined code scheduling, memory
allocation, and array binding in embedded system design; pp:105
- 110; DAC 2005
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066254: Gerolf Hoflehner, Knud Kirkegaard, Rod Skinner,Daniel Lavery, Yong-fong Lee, Wei Li. Compiler Optimizations for Transaction Processing Workloads on Itanium® Linux Systems; pp. 294 - 303; 37th Annual International Symposium on Microarchitecture, 2004.
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- 065819:
BALAKRISHNAN, S.; RAJWAR, R.; UPTON, M.; LAI, K. The Impact of
Performance Asymmetry in Emerging Multicore Architectures. ISCA'05; pp. 506-517
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- 057612:
Rakesh Kumar, Dean M. Tullsen, Parthasarathy Ranganathan, Norman P.
Jouppi, Keith I. Farkas. Single-ISA
Heterogeneous Multi-Core Architectures for Multithreaded Workload
Performance; pp. 64-75;
ISCA '04
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- 049174: MISHRA, P.,
DUTT, N., "Modeling and validation of pipelinespecifications", ACM
Transactions on Embedded Computing Systems (TECS),Volume 3 , pgs.
114-139
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009089: Shorin Kyo, Shin'ichiro Okazaki, Tamio Arai. An Integrated Memory Array Processor Architecture for Embedded Image Recognition Systems, ISCA 2005
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- 057619:
Guilherme Ottoni, Ram Rangan, Adam Stoler, David I. August. Automatic Thread Extraction with Decoupled
Software Pipelining. pp. 105 - 118; MICRO 2005.
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- 936161:
Mancia Anguita; J Manuel Martinez. MP3 Optimization Exploiting
Processor Architecture And Using Better Algorithms; IEEE Micro May/June
2005 Vol 25 N 3;
pp 81-91
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017502: Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, Krste Asanovic. The Vector-Thread Architecture; pp. 52-63; ISCA 2004
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